/** Program to convert logic equations
 * of 16 inputs and 8 outputs
 * to a 64-kilobyte truth table.
 * @author Marko Mäkelä (msmakela@nic.funet.fi)
 * @date 9th July 2003, based on a version from 2nd July 2002
 * The equations in this program have been translated from the
 * files in 8296/82s100.tar.gz compiled by André Fachat in 21th November 1998
 * and verified against the 64-kilobyte dumps supplied by Jens Schönfeld.
 *
 * Compilation:
 *	cc -o pla 324745-1.c
 * Example usage:
 *	./pla | diff - pla-dump.bin
 * or
 *	./pla > pla-dump.bin
 */

#include <stdio.h>

/** Extract an input bit
 * @param b	the bit to be extracted
 * @return	nonzero if the input bit b is set
 */
#define I(b) (!!((i) & (1 << b)))

/** @name The input signals.
 * This mapping corresponds to the 82S100 to 27512 adapter made by
 * Jens Schönfeld (jens@ami.ga).  Note also the permutation of outputs
 * in the main loop.
 */
/*@{*/
#define CASENAI	I(1)
#define Phi2	I(2)
#define BR_W	I(3)
#define BA11	I(4)
#define BA12	I(5)
#define BA13	I(6)
#define BA14	I(7)
#define BA15	I(12)
#define CR7	I(14)
#define CR6	I(13)
#define CR5	I(8)
#define CR4	I(9)
#define CR3	I(11)
#define CR2	I(15)
#define CR1	I(10)
#define CR0	I(0)
/*@}*/

/** @name The output signals. */
/*@{*/
/* FA15 is the expansion RAM address A15 */
#define F7 ((BA15 && !CR7) ||					\
	    (!BA12 && !BA13 && !BA14 && BA15 && CR5) ||		\
	    (!BA14 && BA15 && CR2) ||				\
	    (BA14 && BA15 && CR3) ||				\
	    (BA11 && !BA12 && BA13 && BA14 && BA15 && CR6))

/* NOSCREEN is active when the screen is not mapped into the CPU memory */
#define F5 CR7 && !CR5

/* CASENAII is the enable signal for the expansion DRAM column address */
#define F6 (CASENAI && Phi2 && BA15 && CR7 &&	\
	    (BR_W &&				\
	     ((!BA11 && BA14) ||		\
	      BA12 ||				\
	      (!BA13 && BA14) ||		\
	      (!BA14 && BA13) ||		\
	      (!BA13 && !CR5) ||		\
	      (BA14 && !CR6)) ||		\
	     (BA14 && !BA11 && !CR1) ||		\
	     (BA14 && BA12 && !CR1) ||		\
	     (BA14 && !BA13 && !CR1) ||		\
	     (BA14 && !CR6 && !CR1) ||		\
	     (!BA14 && BA12 && !CR0) ||		\
	     (!BA14 && BA13 && !CR0) ||		\
	     (!BA14 && !CR5 && !CR0)))

/* ENDRA is the enable for the buffer between DRAM and CPU data lines */
#define F4 !((!CASENAI && Phi2) ||		\
	     (Phi2 && BA15 && CR7 &&		\
	      (BR_W &&				\
	       ((!BA11 && BA14) ||		\
		BA12 ||				\
		(!BA13 && BA14) ||		\
		(!BA14 && BA13) ||		\
		(!BA13 && !CR5) ||		\
		(BA14 && !CR6)) ||		\
	       (BA14 && !BA11 && !CR1) ||	\
	       (BA14 && BA12 && !CR1) ||	\
	       (BA14 && !BA13 && !CR1) ||	\
	       (BA14 && !CR6 && !CR1) ||	\
	       (!BA14 && BA12 && !CR0) ||	\
	       (!BA14 && BA13 && !CR0) ||	\
	       (!BA14 && !CR5 && !CR0))))
/* not connected */
#define F3 !((!Phi2 && BA15 && !CR7) ||					\
	     (CASENAI && BA15 && !CR7) ||				\
	     (!Phi2 && !BA12 && !BA13 && !BA14 && BA15 && CR5) ||	\
	     (CASENAI && !BA12 && !BA13 && !BA14 && BA15 && CR5) ||	\
	     (!Phi2 && !BA14 && BA15 && CR5 && CR2) ||			\
	     (!Phi2 && BA14 && BA15 && CR5 && CR3) ||			\
	     (CASENAI && !BR_W && !BA14 && BA15 &&			\
	      CR5 && CR2 && CR0) ||					\
	     (!Phi2 && BA11 && !BA12 && BA13 && BA14 && BA15 &&		\
	      CR6 && CR5) ||						\
	     (CASENAI && !BR_W && BA14 && BA15 &&			\
	      CR5 && CR3 && CR1) ||					\
	     (CASENAI && BA11 && !BA12 && BA13 && BA14 && BA15 &&	\
	      CR6 && CR5))
/* not connected */
#define F2 !((!Phi2 && BA15 && !CR7) ||					\
	     (CASENAI && BA15 && !CR7) ||				\
	     (!Phi2 && !BA12 && !BA13 && !BA14 && BA15 && CR5) ||	\
	     (CASENAI && !BA12 && !BA13 && !BA14 && BA15 && CR5) ||	\
	     (!Phi2 && !BA14 && BA15 && CR5 && CR2) ||			\
	     (!Phi2 && BA14 && BA15 && CR5 && CR3) ||			\
	     (CASENAI && !BR_W && !BA14 && BA15 &&			\
	      CR5 && CR2 && CR0) ||					\
	     (!Phi2 && BA11 && !BA12 && BA13 && BA14 && BA15 &&		\
	      CR6 && CR5) ||						\
	     (CASENAI && !BR_W && BA14 && BA15 &&			\
	      CR5 && CR3 && CR1) ||					\
	     (CASENAI && BA11 && !BA12 && BA13 && BA14 && BA15 &&	\
	      CR6 && CR5))
/* not connected */
#define F1 !((!Phi2 && BA15 && !CR7) ||					\
	     (CASENAI && BA15 && !CR7) ||				\
	     (!Phi2 && !BA12 && !BA13 && !BA14 && BA15 && CR5) ||	\
	     (CASENAI && !BA12 && !BA13 && !BA14 && BA15 && CR5) ||	\
	     (!Phi2 && !BA14 && BA15 && CR5 && CR2) ||			\
	     (!Phi2 && BA14 && BA15 && CR5 && CR3) ||			\
	     (CASENAI && !BR_W && !BA14 && BA15 &&			\
	      CR5 && CR2 && CR0) ||					\
	     (!Phi2 && BA11 && !BA12 && BA13 && BA14 && BA15 &&		\
	      CR6 && CR5) ||						\
	     (CASENAI && !BR_W && BA14 && BA15 &&			\
	      CR5 && CR3 && CR1) ||					\
	     (CASENAI && BA11 && !BA12 && BA13 && BA14 && BA15 &&	\
	      CR6 && CR5))
/* not connected */
#define F0 !((!Phi2 && BA15 && !CR7) ||					\
	     (CASENAI && BA15 && !CR7) ||				\
	     (!Phi2 && !BA12 && !BA13 && !BA14 && BA15 && CR5) ||	\
	     (CASENAI && !BA12 && !BA13 && !BA14 && BA15 && CR5) ||	\
	     (!Phi2 && !BA14 && BA15 && CR5 && CR2) ||			\
	     (!Phi2 && BA14 && BA15 && CR5 && CR3) ||			\
	     (CASENAI && !BR_W && !BA14 && BA15 &&			\
	      CR5 && CR2 && CR0) ||					\
	     (!Phi2 && BA11 && !BA12 && BA13 && BA14 && BA15 &&		\
	      CR6 && CR5) ||						\
	     (CASENAI && !BR_W && BA14 && BA15 &&			\
	      CR5 && CR3 && CR1) ||					\
	     (CASENAI && BA11 && !BA12 && BA13 && BA14 && BA15 &&	\
	      CR6 && CR5))
/*@}*/

/** The main program
 * @param argc	command line argument count
 * @param argv	command line argument vector
 * @return	zero on successful termination
 */
int
main (int argc, char** argv)
{
  /** The input combination, at least 16 bits */
  register unsigned int i = 0;
  do {
    /** The output combination, 8 bits */
    register unsigned char o = 0;
    /* The outputs are permuted so that they correspond to the adapter
     * made by Jens Schönfeld.
     */
    if (F0) o |= 1 << 6;
    if (F1) o |= 1 << 5;
    if (F2) o |= 1 << 4;
    if (F3) o |= 1 << 3;
    if (F4) o |= 1 << 2;
    if (F5) o |= 1 << 1;
    if (F6) o |= 1 << 0;
    if (F7) o |= 1 << 7;
    putchar (o);
  }
  while (++i & 0xffff);
  return 0;
}